High Volume Test Methodology for HBT Device Ruggedness Characterization
- Author:
Cristian Cismaru, Hal Banbrook, and Peter Zampardi
Developing rugged transistors requires careful consideration of the HBT’s collector design. In this work we present a test methodology for high-volume, in-line measurement of device ruggedness. This method is useful not only when developing new epitaxial structures for HBT devices, but also allows in-line monitoring of the device ruggedness for possible deviations due to epitaxial or manufacturing process variations. Moreover, the test is non-destructive.
Please note:
By downloading a white paper, the details of your profile might be shared with the creator of the content and you may be contacted by them directly.
