A 64-element Ka-band Flat Panel Phased Array for Satellite Communications Application

Introduction

Flat Panel Antennas (FPA) at Ka-band (27.5-30 GHz) are the forefront of future technology for Low Earth Orbit (LEO). FPAs are favoured due to their tracking ability, low profile, and easy installation. The antenna presented here is a flat panel phased array beam steering antenna for Satellite Communication (SATCOM) applications at Ka-band. It has a low profile while still offering a high gain with 64 elements (8x8). The antenna is electronically steerable with the capability of steering from -60 to +60 degrees in both Azimuth and Elevation directions. The proposed antenna array works at wide bandwidth (3.5 GHz) at Ka-band (27.5-31 GHz). It can be configured as right-hand circular polarisation (RHCP) or left-hand circular polarisation (LHCP) to meet customers' needs. The phased-array antenna uses third-party beamforming Integrated Circuits (IC) for amplitude and phase manipulation to steer the beam to a desirable angle and shape the radiation pattern.

Due to the high operating frequency, the element spacing in the phased array is small, generally less than half the wavelength (~5 mm at 30 GHz). This compact spacing poses a challenge in integrating all necessary components - beamforming ICs, power distribution network, digital routing, passive components, and antenna elements - while maintaining a low profile. Thermal management is also a significant concern, as active component heat is distributed across a smaller surface area. A multi-layer Printed Circuit Board (PCB) structure is employed to integrate all necessary components within the array lattice.

Design Description

Figure 1 illustrates the hardware development of the planar phased array, consisting of three major parts: Antenna design, Radio Frequency (RF) board design and control board design. 

1. Antenna design: A 64-element patch antenna array design was carried out in CST (Computer Simulation Technology) Microwave Studio 
2. RF antenna Board design: This involves a multi-layer PCB design in Altium Designer, and it integrates all the required components including BFICs and antenna array. The BFICs are mounted on one side of the RF board, and the radiating elements are printed on the other side. The antenna board is constructed by a multi-layer PCB with metal layers designated for RF, Direct Current (DC) and digital routing with thermal distribution. This configuration reduces overall profile, cost, and RF losses.
3. Control board: It supplies the DC power to the BFICs on the RF board and provides digital control signal through Serial Peripheral Interface (SPI). It could be a separated board or implemented on the RF board.

Antenna design: Figure 2 shows the unit-cell of the planar dual-polarised stacked patch antenna. The unit cell consists of three layers: ground, radiating patch and parasitic patch. The patches are fed by two feeding probes for V-Polarisation and H-Polarisation. The size of the unit cell is 4.85 mm x 4.85 mm. The stacked patch antenna was chosen for its low profile, ease of integration and manufacturing. It is known that microstrip antenna with a single patch has a narrow bandwidth of 5% (impedance bandwidth where S11 < -10 dB), while a parasitic patch can increase the bandwidth to 10-20%. This makes it suitable to cover the SATCOM Ka-band at 27-31 GHz.

Figure 1: 64-element Ka-band Circular-polarised SATCOM Transmit (Tx) Planar Phased Array System Overview

Figure 2: Patch antenna element design

The CP (Circular-Polarisation) is achieved by feeding two feeding probes/vias simultaneously with a 90-degree phase shift. In the multi-layer PCB stack up, the two feeding probes are connected to the output of the BFIC directly. Depending on the required polarisation, phase difference can be introduced to the 2 feeding probes from the beamforming IC’s output. The idea of two feeding vias is necessary so that the IC could provide necessary phase variation between the two input ports (V and H）and the excited antenna element could become circular polarised in either LHCP or RHCP. Fencing is also applied around each of the given elements on both the patch and parasitic layer. This fencing involved a square cage around the elements with a line of 5 vias on each side. This was important due to the proximity of the elements to reduce surface waves and coupling effects.

In this design, it’s important to note that the BFIC used have 8 output/input pins and can control 4 antenna elements (forming a 2x2 sub-array), as depicted in Figure 3 and Figure 4. Within the 2x2 sub-array, Sequential Rotation (SR) technique is implemented in which each radiating patch element is rotated either clockwise or anti-clockwise by 90 degrees depending on whether LHCP or RHCP is required. The SR technique enhances circular polarisation performance over a broad frequency bandwidth. Typically, Axial Ratio (AR) is used to quantify CP (where AR<3 dB). Without SR, the AR bandwidth tends to be narrower than the return loss bandwidth caused by impedance mismatch in the antenna array. Each output pin of the ICs controls the phase and amplitude of antenna elements, allowing the beam to be steered in the desirable direction. This configuration enables efficient control and manipulation of the antenna array for optimal beamforming.

Figure 3: Unit cell with two feeding probes and configuration of 2x2 subarray by rotating antenna element either clockwise or anti-clockwise

Figure 4: one BFIC with 4 antennas configured in a 2x2 sub-array and SR being implemented

Each BFIC drives four dual-polarised antennas arranged on a 2x2 quad. Figure 4 depicts a BFIC alongside four antenna elements arranged in this 2x2 sub-array configuration. On a multi-layer PCB, the antennas are implemented on one side, while the BFICs are assembled on the other side. Figure 5 shows the system diagram of a Ka-band Quad 4x2 TX Beamformer IC for the 2x2 subarray.

Figure 5: Tx BFIC with eight beamforming channels for 2x2 sub-array

With the 2x2 subarray (the new unit cell), the 64-element patch antenna array can be constructed. The 64 antenna elements are fed by 16 eight-channel silicon beamformer ICs. Each BFIC drives four antenna elements arranged on a 2x2 quad, together with RF signal, digital lines, power distribution circuitry, are implanted on a single PCB. 

Figure 6 shows the 64-element patch antenna array; Figure 7 shows the simulated 3D radiation pattern of the array, where the main beam is at boresight direction and at 60 degrees in the Azimuth direction. Figure 8 depicts the scanning performance of the array with different scanning angles in the Azimuth direction.

Figure 6: The Tx 64-element patch antenna array

Figure 7: 3D radiation pattern of the 64-elment phased array where main beam is at boresight direction, and 60 degree in the Azimuth direction

Figure 8: Simulated performance of the 64-element patch antenna array

The multi-layer PCB design was carried out in Altium Designer, integrating the Beamforming ICs with the antenna array. The proposed PCB consists of at least 7 layers, The primary material utilized in this PCB design is MT77.

Figure 9 shows a 64-element phased array (8x8) with 16 BFICs integrated on the top layer of the 7-layer PCB. A 1: 16 GCPW Wilkinson Power Distribution network is also implemented on the top layer, and 64 patch antenna elements are printed on the bottom layer. The board size is approximately 11 cm x 9 cm. Total power consumption is about 11 W.

Figure 9: 64-element phased array PCB viewed from the top layer with the integrated 16 BFICs and GCPW Wilkinson Power Distribution Network

Figure 10: The top layer (left) and bottom layer (right) of the proposed 7-layer PCB

Figure 10 shows the top layer and bottom layer of the manufactured proposed 7-layer PCB. The top layer has the 16 integrated BFICs, and bottom layer has the 64-element patch antenna array.

The control board is responsible for supplying DC power to the BFICs on the RF board and controlling the phase and amplitude of the radiating elements via SPI communication with the MCU (Microcontroller Unit). This board operates with a 12 V DC supply. 

The directivity of a single unit cell is about 4.4 dB @29 GHz, which can be given by

where Dx and Dy are the dimensions of the grid of the unit cell. In this design,

The directivity of the 64-element phased array can be given by

Antenna gain G_ant is related to its directivity and can be written as

Where L_ant is the antenna ohmic and dielectric loss and is approximately 1dB. In this case

It should be noted this is the maximum Gain of the phased array at the boresight direction, When the array scans at different angle, there is a gain loss, which is a function of scanning angle. It is about 4 dB loss at 60 degrees off the boresight direction.

The EIRP of the circular polarisation is calculated as

Where P_t is the transmitted power, G_t is the gain of the phased array, N is the number of antenna elements, P_element is the antenna element output power.

The output power from BFIC is 9.5 dBm per channel, as each antenna element is fed with two RF channels, hence the output power from BFIC to each antenna element is 9.5 dBm + 3 dB = 12.5 dBm at OP_1dB, and the EIRP at OP_1dB is about 52 dBm for circular polarisation.

Thermal management is essential for the ICs to maintain performance, so a heat sink and a fan are used to dissipate the heat generated in the system and keep the temperature fluctuation low. The heat sink and fan were mounted beneath the RF board. Figure 11 shows the connections of different parts in the system.

Figure 11: Thermal management of FPA

Graphic User Interface (GUI): a GUI was created for FPA to facilitate the testing process and demonstrate the capability of this phased array. The GUI makes it easy for the user to specify and implement scanning angles, amplitude tapering and polarisation selection. 

Measurement results: A preliminary test has been carried out in the lab. Figure 12 shows the measured radiation patterns at different scanning angles. The developed FPA demonstrates good scanning performance. For the beam at bore-sight direction (90 degree), amplitude tapering is also applied. As a result, a reduced Side Lobe Level (SLL) can be observed.

Figure 12: Measurement results of the phased array (Blue: 27.7GHz; Black: 28.75GHz; Red: 30GHz; Green: 30.2GHz)

Summary

Antenna element spacing for this design is small due to the frequency of operation. This makes the total spacing tight which affects the fitting of all components including the beam forming IC’s, power distribution network, digital routing etc. while keeping a low-profile design. Furthermore, it is a complex and highly integrated design consisting of a Multilayer PCB stack up and incorporating all components within a reasonable sized board.   

SR of the radiating elements is employed to achieve a wider Circular Polarisation bandwidth. The proposed 64-element phased array can steer the beams up to 60 degrees off the bore-sight direction and can produce a gain of over 20 dB. The same design concept can be used to develop a receiving (Rx) array working at 17.7-21.2 GHz for Satellite Communication. The design also offers different and flexible polarisations according to the customers’ requirements.