The Smart Internet Lab at the University of Bristol, has deployed and demonstrated the first end-to-end 5G urban network with the help of Xilinx silicon technology. This flexible and programmable 5G network testbed consisting of 5G NR radio heads connected to the 5G virtualized baseband pool using multiple protocols with dynamic low latency aggregation and elastic bandwidth allocation into the fibre backhaul utilising an end to end SDN controlled environment. Use cases are demonstrated in a hyper-connected Smart City environment, Augmented Reality, Autonomous Transport, and Smart Tourism are being showcased with this 5G network testbed. The project is funded by the UK Government's Department of Digital Culture Media and Sports (DCMS).
The 5th generation of wireless access networks are expected to meet system and service requirements of the new use cases and applications in 2020 and beyond. Connecting industries and enabling new services is the most significant aspect of 5G in preparation to meet the demands of the information society of 2020. The 4th generation, or 4G LTE, is all about people and places with communication and information sharing being the core theme. 5G extends the scope to machines by adding reliable and resilient control and monitoring to the 4G theme of communication and information sharing. This shift has a profound impact on the system requirements and design principles. 5G vision is all encompassing and touches all aspects of our lives from how we produce goods, manage energy and environment in process of production, transport, store, and consume goods, to how we live, work, commute, entertain, and even relax.
Xilinx All Programmable FPGA and SoCs are playing a critical role in implementing 5G proof of concepts, test beds and early commercialization trials for eMBB, URLLC, and mMTC use cases. Merchant silicon does not exist and ASICs are not viable this early in 5G standardization phase. The key value proposition of the platforms based on Xilinx All Programmable FPGAs & SoCs is that these systems can be dynamically repurposed to support any function and enhanced algorithmic implementations to address those multiple different use cases.
