Designing Wafer Level Chip Scale Packaging

Expert Matthew Ozalas provides a overview on wafer level packaging and lists the advantages and challenges. He then goes through two examples on the Keysight UXR Channel Module and the GLOBAL FOUNDRIES ADK Integrated Phase Array on Package, and highlights the challenges of closing the gap on technology management, assembly, and EM based design. He introduces Keysight Technology Assembly and EM solution in a live demo as the way to solve these challenges