RF design simulation solutions provider, Cadence, has announced the release of the Cadence AWR Design Environment Version 15 (V15). The new update includes the AWR Microwave Office, AWR Visual System Simulator (VSS), AWR AXIEM and Analyst electromagnetic (EM) simulators.
The latest release brings RF/microwave design solutions to the Cadence software portfolio for monolithic microwave integrated circuits (MMIC)/RFIC, package/module, and printed circuit board (PCB) designs. The release provides key new features, add-on modules and enhancements driven by 5G, automotive and aerospace and defense applications.
The updated V15 improves engineering productivity with new analyses, faster and higher capacity simulation technologies, time-saving design automation and 5G New Radio (NR) compliant test benches that support power amplifier (PA) and antenna/array design, EM modeling and RF/ microwave integration across heterogenous technologies.
Release Highlights:
AWR Design Environment Platform
- Environment/Automation
- Load-pull contours on rectangular plots
- Template-based measurements
- Add/edit optimization goals directly on graphs
- Edit axes directly on plots
- Color-coded markers
- Equation grouping
Physical Design/Layout
- Real-time design rule check (DRC) compliant intelligent nets (iNets) routing guides
- Mixed physical units/grid support
- Two-click data entry mode
- Resize layout objects with property page editing
- Gerber file import for EM analysis
Microwave Office Circuit Design and Simulation
- Fast, rigorous stability analysis
- Low-frequency load pull for two-tone excitations
- Integrated TX-Line calculator/synthesis
- Network synthesis with process design kits (PDKs)/vendor components
AXIEM and Analyst EM Simulators
- Faster, more robust adaptive meshing
- Fast, accurate DC solver
- Peak antenna measurements
Visual System Simulator (VSS) System-Level Design
- Preconfigured 5G NR testbench libraries
- Phased array MIMO bus support
- PA linearization with digital predistortion (DPD)
The V15 release optimizes engineering throughput and productivity by reducing manual design tasks and supporting tool interoperability. New circuit simulation capabilities address fast and rigorous nonlinear stability analysis for multi-stage and balanced amplifiers and video-band load pull to optimize low-frequency impedance terminations for reduced intermodulation distortion.
Network synthesis supports impedance network development using vendor components and PDKs, as well as synthesis capabilities launched directly from schematic. Robust simulation engines solve large structures more quickly using EM analysis with enhanced meshing and smart geometry handling for chip, package and board characterization. Preconfigured 5G NR compliant test-benches provide signal sources and measurements for PA and RF link validation.
Click here to learn more about the release.
