Coupling Wave Solutions, has announced the availability of a new productivity tool called SiPEX. SiPEX models the silicon substrate on insulators much faster than any other tools in its class and allows radio frequency (RF) silicon-on-insulator (SOI) designers to increase the number of design iterations—including Spice simulation—up to 10 times in the same time frame.
By allowing an RF switch designer to make ten times more design iterations per day, they have increased their productivity at a reduced cost-of-ownership. With SiPEX, RF switch designers will be able to make their design changes in less than 15 minutes and obtain a few decibels (dB) of variation over silicon measurements in simulation. This is a dramatic improvement over current productivity levels.
State-of-the-art RF front-end components require advanced design methodologies and tools. SiPEX helps engineers improve their productivity and close the gap between simulation and silicon measurements when optimizing the linearity of their chips.
With SiPEX, RF designers can either evaluate more design implementations in any given time frame, or accelerate the tape out to the RF SOI foundry, shortening the time-to-market. SiPEX provides field solver-like accuracy. In addition, RF SOI foundry can back-annotate the silicon measurements in their Process Design Kit (PDK) and ensure that Spice simulation with SiPEX will match the actual silicon measurements.
SiPEX is available as a plug-in for generic interconnect parasitic extraction tools including Mentor Graphic’s Calibre®.
About Coupling Wave Solutions
Coupling Wave Solutions is a provider of parasitic extraction and activity modeling tools for system-level interference analysis of complex designs incorporating RF and analog blocks, targeting SOI applications or advanced bulk process nodes including 28nm and below. Their unique harmonic analysis approach allows for controlling and managing noise issues throughout the design cycle from components, to packages, up to and including board design. Wrapped in ‘easy-to-deploy’ software bundle, WaveIntegrity is used by chip architects and designers to drive the chip design floorplanning and by package and PCB designers to integrate the noise-related design constraints in the final chip operational environment. Founded in 2003, CWS’ offices are located in Paris, Grenoble, France and San Jose, USA.
