Fill one form and get quotes for cable assemblies from multiple manufacturers
The Challenge:Analyzing and displaying the GB/s class radar data from high-resolution 96 GHz millimeter-wave radar front ends to detect small debris on airport runways.The Solution:Using the NI PXI platform and FlexRIO to achieve the real-time radar signal processing based on the FPGA hardware clock with a high-data throughput rate, and using LabVIEW code for the radar signal processing to reduce the development time by 90 percent that of the conventional programming method.Foreign Object Debris Detection on Airport Runways
Demand to automatically detect foreign object debris (FOD) on the airport surface has rapidly increased in recent years. Even if such FODs are small in volume and size, these objects can damage aircraft. After the Concorde accident in 2000 at Charles de Gaulle Airport in Paris, which was caused by a small metallic plate on the runway, the detection of FODs is an important issue for airport administration. Runway downtime due to safety checks is not negligible for the efficient operation of the runway time slot. Electric Navigation Research Institute (ENRI) is the national research agency that aims to develop civil technologies for aviation surveillance and communication, air traffic safety, and efficient operation of air traffic routes. Among the various research topics for civil aviation safety technology, we are developing the millimeter-wave radar system to detect small FODs on airport runways. The millimeter-wave radar system enables high-detection performance, high-range resolution, and weather robustness compared with camera systems. However, the system also comes with many challenges, such as development of a millimeter-wave circuit and signal processing circuit to realize the high-performance FOD detection system for the airport runway.
Millimeter-Wave System Overview
The millimeter-wave radar system consists of a beam-scanning antenna, millimeter-wave transmitting and receiving circuits, signal generation, processing circuits, and synchronize and control circuits. The R&D topics of the FOD detection system are mainly for both the 96 GHz millimeter-wave front-end circuits. In addition, the receiving signal processing circuits and synchronization circuits are essential parts of the high-performance radar system. On starting the research of millimeter-wave radar signal processing and synchronization with a new technology, we faced three challenges:
1. To confirm the progress of the research and to carry out the airport field experiments, the radar prototype system is constructed every year during the four-year R&D period. Because of this, we must construct the receiving signal processing circuits and synchronization circuits in limited time. Our available time for development was limited to less than one month to accommodate the development schedule for the millimeter-wave circuit construction and the inspection to obtain the experimental radio license.
2. The millimeter-wave radar system enables sub-centimeter range resolution using the wide-band frequency resources. However, to realize the high resolutions in the large detection area of the airport runway, the radar system must process the huge data in a short time. For example, assuming a 5 cm range resolution, 200 m diameter coverage, and 360 degrees azimuth beam scanning in 0.036 degrees angle resolution, the amount of data is at least 1.2 GB/s (16-bit amplitude resolution) for each radar front end. We cannot analyze this amount of radar data without a hardware logic circuit, such as the FPGA or ASIC circuit.
3. The radar signal processing circuit requires complex signal processing such as fast Fourier transform (FFT) and coherent signal integrations with trigger synchronization. Outsourcing this complicated system leads to high costs and a long development period. In addition, to implement the novel algorithm obtained by the research project, the analyzing programs must modify and add the functions by the researchers. If we use multiple programming languages such as VHDL for FPGA circuit and C for the host computer, we are concerned about the cost to acquire the programming skills.
To overcome these problems, we used the NI PXI platform, the FlexRIO system, and a digitizer adapter module to develop the receiving signal processing circuits and the synchronization and control circuits. Figure 1 shows the proposed radar system is a distributed-type optically connected millimeter-wave radar system based on the radio-over-fiber (RoF) technology. The “distributed-type” means the radar system consists of a central unit inside a facility building and some antenna units near the runways. Each antenna unit covers each detection area in the runway. The transmitting frequency is between 92 GHz and 100 GHz. The radar signal transmitting source is located in the central unit. The electrical millimeter-wave transmitting signal is directly converted to the optical signal. This enables the low-loss transmission of millimeter-wave radar modulated signal by more than 10 km. In addition, the receiving signal obtained at the antenna unit also transmits to the central unit through the optical fibers.
This radar architecture achieves the low-cost construction of the large-scale millimeter-wave radar system, based on the central signal generation and processing and very simple antenna units. The central signal processing is a key feature to achieving the distributed-type radar system; however, this requires a high-data throughput rate and flexible construction as described in the previous section. To solve the problem, we chose the central system construction with LabVIEW software, the NI PXI platform, and FlexRIO hardware. Figure 2 and Figure 3 show the overview of the optically-connected distributed-type 96 GHz millimeter-wave radar system and the block diagram of the radar signal processing circuit, respectively. The NI PXIe-7975R FlexRIO FPGA module has enough flip flop slices and memory resources for the FFT analysis, signal integration, and signal synchronization. In addition, the PXI Express bus can transfer the analyzed radar receiving data to the host program with up to an 8 GB/s throughput rate using the DMA FIFO. For the NI PXIe-7975R, we used the NI 5762 16-bit, 250 MS/s digitizer module. The NI 5762 has 12-channel digital I/O, which can control the beam-scanning antenna and obtain the information of antenna direction. Since this digital I/O also directly connects to the FPGA circuit, we can achieve the precise signal synchronization based on the hardware clock. Furthermore, we can also achieve the signal synchronizations between the transmitting signal source and the AD converter based on the FPGA clock with low-time jitter.
Figure 3. Block diagram of the radar signal processing circuit for a single antenna unit, which is based on the NI PXI platform and FlexRIO
Figure 5. Example of the combined radar scope obtained in the Sendai Airport field experiments
Figure 6
Create an account on everything RF to get a range of benefits.
By creating an account with us you agree to our Terms of Service and acknowledge receipt of our Privacy Policy.
Login to everything RF to download datasheets, white papers and more content.