Reducing Board Surface Area and Improving RF Performance by Embedding Ultra Thin Capacitors

Board space limitations are pushing for smaller components and greater component density while maintaining or improving broadband performance. The industry has tried to accommodate board limitations by embedding components within the board material itself. Even though many passive components are designed to have a minimal part height, traditional capacitors are thicker components, which makes them undesirable for embedded solutions. This study focuses on the Metal Oxide Silicon (MOS) Capacitor technology, and how these capacitors are ideal for embeddable applications, and help improve high-frequency performance.

Objectives: Reducing board space by taking advantage of component technology that can be thinned to the point of embedding.

Technology or Method: The MOS capacitor lends itself to the thinning required to embed in circuit boards and the improvements that come from that.

Results: Using ultra-thinned MOS Capacitors, the frequency performance of the circuit improves while reducing the board space used by having components stacked.

Clinical or Biological Impact: Using embeddable devices, particularly the MOS capacitor, the board space can be reduced while improving performance allowing for smaller overall devices that could improve size-constrained applications.

Introduction

There are fabrication houses that specialize in embedding components in a specific layer of the Printed Circuit Board (PCB) and drilling vias that connect to the component.  When designing embedded components, the part must be thin enough to fit between the layers in the PCB. Due to board layer constraints, component thickness is the most critical factor to consider.

There are many component thicknesses that are designed to rely on the surface of their chip. This reliance allows the part to be thinned to the limitations of the material. An example would be the Thin Film WBR (Wire Bond Resistor) from Kyocera AVX. This product utilizes pads, that easily connect to vias, allowing for its total thickness to be below 5 mm. This thin thickness makes this product ideal for circuit board embedding.

In contrast to components, like the WBR, that depend on the chip surface, there are components that depend on their individual thickness. An example is traditional capacitors that rely on a set thickness to create their capacitance. Due to this, most traditional capacitors are non-ideal for the specific purpose of embedding. In its place, manufacturers consider the unique design of the MOS capacitor. The MOS capacitor technology is not only optimal for embedding but is also breathing new life into embedded technology.

Capacitor Background

Capacitor design is based on the following variables: the dielectric material’s relative permittivity (ɛ_r), the thickness of the dielectric material (d), and the area of the metal encompassing that dielectric material (A).

There are two ways to change the capacitance. The first way is to change one of the variables listed above. The second way is to change the number of plates (N).

Changing the number of plates provides traditional surface mount devices with a robust component capable of having a wide range of values in 0201 and 01005 case sizes. For these instances, adding more plates is the preferred method used to increase capacitance while maintaining the smallest overall package size. However, adding more plates or increasing plate distance will also increase part thickness.

Fig. 1. Cross section of a traditional surface mount capacitor with multiple plates with 1 terminal shown with blue plates and the other with red plates

Figure 1 shows the layout of a traditional multi-plate capacitor. Although these capacitors are excellent for many scenarios, they are not an ideal fit for embedded components. The two major issues with multilayered capacitors are their part thickness and their terminations. The wrapped style terminations not only limit the connections between the capacitor and chip but also require the capacitor to be isolated from the internal board layers. In order to connect the capacitor to the board layers, it must either be connected by vias, or oriented vertically, which will dramatically increase the thickness.

A. Single Layer Capacitor (SLC) Background

Another style of capacitor design is the SLC. This capacitor replaces the multiple-plate design with a two-plate design. The dielectric material used is an electrically isolated ceramic material with a metal layer attached to two sides, creating the plates of the capacitor.

Fig 2. Left Cross section of a single-layer capacitor the top metallization is represented with a blue line and the backside metallization is represented with a red line. Right Render of SLC frontside (with border) and backside

Figure 2 left shows an example of a SLC cross-section. This capacitor technology does not use a multiple-plate design. Instead, it is a two-plate design with the metallization structure on the top side and the backside. This design allows the top side to offer a larger surface area for connections, while the back side is connected to the ground. Unfortunately, there is a drawback to this technology. It can be assumed that SLC capacitors have a fixed chip, and the capacitor’s area is relatively constant. Also, there are limited ceramic materials applicable for this process and the relative permittivity has a set range. Therefore, the only way to change the capacitor value is to change the part thickness.

Even though SLCs can offer a great variety of capacitance values in the required footprint and package size, they are not preferred for embedded design because the part thickness cannot be fixed to a minimum.

B. Metal Oxide Silicon (MOS) Capacitor Background

Utilizing a build methodology similar to the SLC, the MOS Cap replaces the dielectric and conductive material. For MOS Cap Technology, the bottom electrode is replaced with a silicon substrate and the passivation material is exchanged for thermally grown SiO₂. For this technology, the chip itself does not determine the plate distance. Instead, it is determined by the oxide layer thickness. Also, the encompassing area is defined by the metalized area on top of the chip. With these defined variables, it is possible to change the capacitor value while maintaining a part thickness under 5 mil.

Fig. 3. Cross section of metal oxide silicon capacitor with blue line for top side metallization and black line for backside metalization

Figure 3 illustrates the cross-section of a MOS capacitor. The capacitor has a variable dielectric material and a pad size that allows for multiple cap values. Also, it has a fixed chip thickness, that can be thinned to extreme values. With these three features combined, MOS capacitors are the ideal component for embedded designs.

Methods and Procedures: Embeddable Design Options Using MOS Capacitor Technology

Utilizing the MOS capacitor technology there are multiple ways to design components for a PCB. The simplest design is to use the capacitor to connect a surface mount component from an external trace to an internal trance. This is done through vias connecting traces on different layers of a multilayer printed circuit board.

Fig. 4. Printed circuit board with embedded MOS capacitor and via from a surface mount component to an internal trace.

The image in Figure 4 depicts the Embeddable MOS Capacitor between layers of a Printed Circuit Board. One of the components located on the surface of the PCB connects to one of the top pads on the MOS capacitor. Then the pad on the backside is connected to an internal trace of the PCB. This would allow a capacitor to be connected in series with surface mount components while saving space on the PCB surface.

For shunt-style designs, the top pad of the MOS capacitor is connected to a surface mount component and the backside is connected to the ground. There are several options for how to embed the capacitor. The first option is similar to that in Figure 4.

Fig. 5. Printed circuit board with embedded MOS capacitor and via from a surface mount component to a ground plane.

Figure 5 shows one or more via connected to an internal ground plane. The surface mount component can be connected to the ground through the capacitor. Similar to this, it is possible to embed the capacitor directly on the ground plane. Figure 6 shows how it is possible depending on how the board is laid out.

Fig. 6. Printed circuit board with embedded MOS capacitor mounted on ground plane and via from a surface mount component

The ground-connected MOS capacitor could use vias to connect to multiple surface mount components. This could be accomplished by either mounting the capacitor directly onto the ground plane or with vias connected to the ground.

Fig. 7. Printed circuit board with embedded MOS capacitor mounted on ground plane and vias from multiple surface mount components

Figure 7 depicts how multiple surface mount components can use a large surface area suitable for via placement to connect to the same capacitor to the ground. The vias can connect to internal lines or directly to the capacitor from the surface. The figure shows the capacitor mounted on a ground plane, but the backside could be connected with vias to the ground plane as well.

A final connection option is to use a MOS capacitor array. Utilizing different pad sizes on the top layer, the MOS capacitor can have multiple capacitors on one chip. These capacitors could have the same value, or they could be different.  With these multiple capacitors all connected to the ground plane, the number of embeddable MOS capacitor chips needed can decrease.

Fig. 8. Printed circuit board with embedded MOS capacitor array mounted on ground plane and vias from multiple surface mount components

Figure 8 shows one implementation of an embedded MOS capacitor array. Opening the door to endless design possibilities, while maintaining space on the PCB surface.

Results: Embedded MOS Capacitor Broadband Performance

Embeddable MOS capacitors are capable of saving onboard space but can also help improve RF performance over the surface mount capacitor options.

A. MOS Capacitor Comparison Embedded vs Wirebond

The primary point of concern for the high-frequency performance of an SLC-style capacitor is the wire-bond connection. This limits high-frequency performance. A 10 pF MOS capacitor was modeled on a transmission line with a wire-bond connection and in an embedded configuration in the series mode.

Fig. 9.  Left 10 pF MOS capacitor on Rogers 4350 test board with wire-bond connection. Right 10 pF MOS capacitor embedded in epoxy filled Rogers 4350 test board with via to transmission line.

Figure 9 shows the connection for both capacitors in the model. These were modelled using Ansys Electronics Desktop 2022 R1.2. Both use the same test board, transmission line width, gap, and capacitor. The only difference in the test setup is the conditions of embedding. To account for this the embedded design has a section of the Rogers test board removed and replaced by epoxy. The MOS capacitor is placed into the epoxy with a connection to the transmission line on the top of the capacitor, the backside is connected to an inboard line that has a via to connect to the other transmission line. The simulation was done with a ½ inch x ½ inch test board. The test board is not de-embedded from the design.

Fig. 10. Ansys modeled results of the 10 pF MOS capacitor using a wire-bond connection in red and an embedded connection in blue

As seen in Figure 10, the embedded capacitor has less loss at higher frequencies than the same capacitor using a wire-bond connection. As the frequency increases this difference also increases even though the capacitor, test board, and transmission line are essentially the same.

B. Gain Equalizer Design using 10 pF Surface Mount MLCC Capacitor and Embedded MOS Capacitor

As an example of how this methodology can be used to both reduce board space and improve broadband performance, a simple gain equalizer was designed using a 10 pF 0402 surface mount capacitor and a 0402 broadband resistor. The same circuit on the same test board was then changed to a 0402 broadband resistor in series with an embedded 10 pF MOS capacitor, this is shown in Figure 11.

Fig. 11. Left  Broadband resistor mounted in series over an embedded 10 pF MOS capacitor. Right Broadband resistor and surface mount 10 pF capacitor in series on test board

The space savings of a 0402 component is clear from the images. For the high-frequency performance, the components were modeled on the same test board with the same transmission lines. For this simulation, a Rogers 4360G2 board material was used.

Fig. 12. Gain equalizer performance with embedded capacitor design in red and surface mount capacitor in blue.

Using the MOS capacitor improves the performance and flattens the loss above the roll-off point of the gain equalizer. Figure 12 shows this improvement. This is despite the fact that a stand-alone surface mount capacitor will have better performance through high frequency than a typical MOS capacitor, but when the capacitor is embedded instead of using the wire bond that difference shrinks.

Summary

Utilizing MOS capacitors with embedding techniques relieves some of the difficulty and strain of designing the pervasive high-density PCB. Compared to existing capacitor technologies, MOS capacitors are optimal for embedding. In addition to physical capability, the higher working voltages, and high Q of MOS caps add to the fact that they are ideal for industry leaders employing advanced packaging techniques for power amplifiers, I/O and optical matching circuits. The broadband improvements by adding embeddable MOS capacitors will make them viable in many applications needing space and performance. As Hybrid and Heterogeneous Integration (HI) packages become more sophisticated e.g., State-of-the-Art Heterogeneous Integrated Package (SHIP), embeddable components will become more prevalent and lead the race for passives in the MOS capacitor.