What is RF LDMOS Technology?

What is RF LDMOS? What are its electrical characteristics?

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Sep 16, 2024

An LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor is a type of Silicon based MOS transistor designed for high-power and high-frequency applications. Unlike the conventional silicon based transistors, that are usually optimized for low-power digital circuits, LDMOS transistors uses lateral diffusion of the source and drain region, which enhances the transistor’s ability to handle higher voltages and power effectively. 

LDMOS transistors are characterized by their high-power density, linearity, efficiency, high breakdown voltage, and low on-resistance. These characteristics make them suitable for operating at higher power levels while maintaining performance. RF LDMOS Transistors are widely used to develop RF power amplifiers that are used in Base Stations, Radars and for RF Energy Applications.

Working and Structure of an LDMOS Transistor

An LDMOS transistor is a three-terminal device, with a source, gate, and drain terminal. In typical configurations, the substrate is shorted with the source. The voltage on the gate controls the flow of current from the drain to the source.


The most common configuration for these devices is the Common Source (CS) configuration, in which the drain is connected to high DC voltage while the source is grounded. The gate is used to induce a field-enhanced depletion region between the source and drain, thus creating a “channel”. The LDMOS channel is predominately defined by the physical size of the gate structure. The source and drain are laterally on the opposite sides of the gate area, and the diffusion process may produce an undercut region below the gate due to the single-step lateral diffusion process.



Structurally, LDMOS is different from the conventional MOSFET as it has a laterally diffused channel, a thicker drain drift region, a buried contact (meaning some components are embedded deeper in the structure), a thicker gate oxide, and a larger layout. The thick and highly doped drift region in LDMOS can withstand high electric fields, and therefore, the device can work at high voltages without breakdown. Also, the higher doping concentration reduces the resistance of the device due to which it offers lower power dissipation and higher efficiency.  


In LDMOS, a diffused p-type channel (PHV) region is created in a low-doped n-type region. The low doping on the drain side results in a large depletion layer with high blocking voltage. It includes a source metal region to electrically connect the N+ source to the P+ sinker. The P+ sinker is connected to the backside source metal through the P+ substrate. This feature lowers the source inductance and improves the performance of the device. It also allows the die to be directly attached to an electrically and thermally conductive flange package. The electrons flow from the source to the drain if the gate is positively biased.

Boron is used as the dopant for creating p-type semiconductor regions, and Arsenic as the dopant for n-type. The threshold voltage and turn-on characteristics of the device are established by the boron-doped p-channel (PHV), and a low-doped arsenic n-type drift (NHV) region is designed to support high breakdown voltage, low on-state resistance, and good Hot Carrier Injection (HCI) reliability. The WSi/polysilicon provides a low gate access resistance, which is important for the large dimension of RF power devices. The metal-2 gate bus running parallel to the gate makes periodic connections to the gate WSi/polysilicon stack to reduce the resistance. Grounded shield structures are also used to reduce the feedback capacitance between the drain and gate and to control the surface electric fields. 

Key Features of LDMOS Transistors

LDMOS transistors usually operate across a frequency range from 1 MHz to 4 GHz and are widely used in Base Station and RF Energy Applications. These transistors support power levels from just a few watts for driver devices to several thousand watts for pulsed applications. The LDMOS comes in various variants based on their operating voltage (typically ranges from 3V to 400V) with the 30V and 50V LDMOS being the most common choice in the market. The 30V LDMOS is typically preferred for baseband applications, while the 50V LDMOS is used in high-power applications. They are suitable for DPD and Doherty amplifiers due to their high gain (> 20 dB at 2 GHz), efficient performance, excellent reliability, and cost-effectiveness. The power density of 30V LDMOS is 1.4 W/mm, while the 50V LDMOS offers a higher power density exceeding 2 W/mm. The increase in power density is predominantly due to the increased supply voltage while the current capability of both technologies remains the same, i.e. 5 mA per gate periphery.

Key Parameters of LDMOS Technology

Parameter 

30 V LDMOS 

50 V LDMOS 

Drain-Source Voltage 

Up to 30V 

Up to 50 V 

Power Levels 

A few watts (driver devices) 

Several thousand watts (pulsed) 

Gain 

15-20 dB 

10-18 dB 

Thermal Resistance  

Lower  

Higher 

Power Density 

1.4 W/mm 

> 2W /mm 

 In power applications, LDMOS devices with multiple fingers are usually placed in a ceramic or plastic package. The flange is soldered to the back of the source, while the bond wires connect the drain and gate to the leads. The input and output impedance can be as low as a few ohms, so to increase it, high-quality matching is done inside the package. The key parameters for LDMOS are not only the DC parameters, such as on-resistance and the maximum current capability, but also the output, input, and feedback capacitances. The output capacitance is important for the frequency-dependent losses and the bandwidth of the power amplifier.

Layout Diagram of LDMOS with multiple fingers 

An important feature of LDMOS as compared to conventional MOSFETs is its enhanced ruggedness. In a conventional MOSFET, ruggedness failure occurs when internal power dissipation leads to extremely high power levels, causing thermal damage. It occurs due to a drain breakdown event; i.e. internal charges accumulate and distribute within the MOSFET. However, LDMOS devices are designed with improved thermal management and charge distribution mechanisms which help to prevent such breakdown events and help in handling high-power conditions more effectively.

Applications of LDMOS Technology

LDMOS transistors are widely used in applications requiring robust performance and high power handling. They’re used in RF and microwave amplifiers for communications systems like cellular base stations and satellite communication systems. They amplify the signals between the base stations and satellites, thus enabling efficient and reliable data transmission over long distances. In military applications, they’re employed in radar and communication systems and in electronic warfare equipment. Due to their high power density and their ability to convert electrical energy to RF energy, the LDMOS technology is utilized in various RF energy applications. This includes industrial heating, medical treatments, and consumer products where RF energy is used for processes such as dielectric heating or therapeutic applications. 

The LDMOS transistor made from silicon is less expensive and well-suited for high-power applications but it can’t operate at frequencies as high as GaN, which can operate at frequencies up to tens of GHz. Thus, for the same power levels for low-frequency applications LDMOS is preferred over GaN based transistors.

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