The ADRV9002 from Analog Devices is a Dual Channel RF Transceiver that operates from 30 to 6000 MHz and covers the UHF, VHF, licensed and unlicensed cellular bands, industrial, scientific and medical (ISM) bands. This highly-integrated transceiver has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption required by battery-powered radio equipment and can operate in both FDD and TDD modes. It can support both narrowband and wideband standards up to 40 MHz bandwidth on both receive and transmit.
The transceiver consists of direct conversion signal paths with state of the art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction, and programmable digital filters, which eliminate the need for these functions in the digital baseband. In addition, several auxiliary functions such as auxiliary analog-to-digital converters (ADCs), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integrated to provide additional monitoring and control capability.
The fully integrated phase-locked loops (PLLs) provide high performance, low power, fractional-N frequency synthesis for the transmitter, receiver, and clock sections. All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. The local oscillators (LOs) have flexible configuration options and include fast lock modes. The transceiver includes low power sleep and monitor modes to save power and extend the battery life of portable devices while monitoring communication. The fully integrated, low power digital pre-distortion (DPD) is optimized for both narrowband and wideband signals and enables the linearization of high-efficiency power amplifiers.
The ADRV9002 core can be powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard 4-wire serial port. Other voltage supplies are used to provide proper digital interface levels and to optimize receiver, transmitter, and auxiliary converter performance.
High data rate and low data rate interfaces are supported using configurable complementary metal-oxide semiconductors (CMOS) or low voltage differential signaling (LVDS) serial synchronous interface (SSI) choice. The ADRV9002 is available in a 12 mm × 12 mm, 196-ball chip-scale package ball grid array (CSP_BGA), and is ideal for mission-critical communications, TDD and FDD applications.
