The Internet of Things [IoT] is the new wireless touchstone connecting live information, control mediums and hubs to wireless devices such as phones, tablets and computers. These applications are widely used in Smart Homes, Smart Cities, Smart Factories, Smart Healthcare, Smart Agriculture and Smart Energy. As a result, next generation MCUs, SoCs or FPGAs created to meet new communication requirements have challenged chipset designers to develop architectures that provide improved fast communication along with low noise performance, but also at low power consumption. Utilizing low power elements helps continuous operation over long periods of time, but also increase challenges like reductions in oscillator gain margin and signal to noise ratios.
Currently there are billions of connected IoT devices. An exponential increase of connected devices is expected over the next decade, as 5G infrastructures will be readily available along with more affordable consumer devices. The seemingly limitless connections promised by 5G will continue to burden infrastructures and push the boundaries of chipset performance, requiring the timing block and associated frequency reference to provide very reliable low power operation.
