In recent years, there has been a growing demand for GaN-based products stemming from the increased adoption of GaN power and RF devices in a variety of applications. From a military, defense, aerospace, and next-generation telecommunication, particularly with 5G network, GaN-based materials’ wide-bandgap offers remarkable breakdown electric field and high drift velocity suited for the fabrication of high power and high-frequency devices.
In terms of applications, III-nitride materials, i.e. GaN, are generally heteroepitaxial grown on a substrate. Among various substrate materials, the silicon substrate is widely selected for the growth of epitaxial stack comprising III-nitride materials due to the lower substrate cost and flexible scalability on the substrate size. From a material property viewpoint, differences such as thermal expansion coefficient and lattice constant between III-nitride materials and silicon substrate can pose technological challenges, i.e. crack, defect, wafer bow, and crystal quality for practical applications.
One such issue is the presence of parasitic channels formed at III-nitride/silicon interface, which leads to parasitic loss – severely degrading the output power, power gain, and efficiency of devices especially when they are operating at high frequency. A key requirement in GaN HEMT-on-Si for RF applications is the reduction of conduction loss at the AlN/Si interface. As the AlN/Si interface can become conductive due to the doping of Al and Ga residuals in the reactor, preconditioning of the reactor and the growth conditions of first AlN layers on Si substrate will be crucial for the suppression of the conduction loss.
IGaN’s technology achieves very low conduction loss meeting the industry standards for GaN HEMT on Si for RF applications. Recently processed IGaN GaN on Si HEMT wafers has achieved a conduction loss of 0.15dB at room temperature and 0.23dB at high temperature for an operating frequency of 10GHz. Low conduction loss is one key factor to achieve low RF loss, which is critical for RF devices.
Besides the conduction loss test, IGaN has implemented a quick method of screening-out poor-performing GaN epiwafers before fab processing that can save customers expensive scrappage and help avert potential wastage of processed wafers and packaged devices downstream if the epiwafer substrates has high conduction losses. Early detection of high conduction loss epiwafers is critical for the mass production of RF GaN devices.
RF Epistack on 200m substrates is under development and will be available to customers by end of Q1 2021.
