TowerJazz and UCSD Demonstrate First 5G 60 GHz Silicon Wafer-Scale Phased Array Transmitter

Scale Phased Array Transmitter

TowerJazz has announced they have collaborated with The University of California, San Diego (UCSD) to demonstrate the first 256-element (16 x 16) wafer-scale phased array transmitter with integrated high-efficiency antennas that operates from 56 to 65 GHz. First time success was achieved for the wafer-scale RFIC using TowerJazz’s own proprietary models, kit and the mmWave capabilities of its 0.18-micron SiGe BiCMOS process, SBC18H3. The collaboration of the wafer-scale phased array chip was partially funded through collaboration with DARPA.

In addition, TowerJazz proprietary methods allowed for very large chip area with an extremely high level of integration. The phased-array system-on-a-chip (SoC) targets the emerging 5G high-performance wireless standard which will aim for greater than 10 Gbps (gigabits per second) peak data-rate communication. The array has beamforming capabilities that include independent amplitude and phase control for all 256 different antenna elements. By developing this wafer-scale chip, UCSD and TowerJazz have successfully demonstrated highly scalable RF-IC transmitters for 5G phased array applications.

Phased arrays allow the electronic steering of an antenna beam in any direction and with high antenna gain by controlling the phase at each antenna element. The radiation beam can be “moved in space” using entirely electronic means through control of the phase and amplitude at each antenna element used to generate the beam. This beam steering technique is much more compact and much faster than mechanically steered arrays. Furthermore, phased arrays allow the creation of deep nulls in the radiation pattern to mitigate strong interference signals from several different directions. UCSD’s design and utilization of TowerJazz wafer processes are targeted to greatly reduce the cost of phased arrays especially at millimeter-wave frequencies for 5G communication systems. 

The wafer-scale 256-element SiGe BiCMOS SoC phased-array is 42x42 mm2 and combines the 60 GHz source, amplifiers, distribution network, phase shifters, voltage controlled amplifiers, and high-efficiency on-chip antennas (16 x 16 elements), allowing record performance for a new generation of high-performance phased arrays for the 60 GHz band (56-65 GHz). The antennas are integrated on-chip which removes the expensive and lossy transitions and distribution network between the phased array and the off-chip antennas. This wafer-scale phased array with 256 radiating elements, together with all the necessary CMOS control circuits such as dual SPI control (serial parallel interface), is capable of electronic beam scanning to +/-50 degrees in all planes – the most of any mm-wave phased-array antenna to date. The architecture could be scaled to 512 (16x32) or 1024 (32x32) elements due to on-chip antenna integration and the wafer-scale integration of multiple reticles on a single chip.  

The phased array chip was developed using TowerJazz’s SBC18H3 BiCMOS which offers both high-performance 0.18-micron SiGe bipolar and high quality passive elements combined with high density 0.18-micron CMOS, to enable high-speed networking and millimeter wave applications. The process offers SiGe transistors with peak Fmax of 280 GHz and peak Ft of 240 GHz, ideal for low-power, high performance millimeter wave circuits, which replace the need for more expensive GaAs chips. SBC18H3 comes standard with 1.8 and 3.3 volt CMOS (dual-gate), deep trench isolation, lateral and vertical PNP transistors, MIM capacitors, high-performance varactors, poly-silicon as well as metal and N-well resistors, p-i-n and Schottky diodes, high-Q inductors, triple well isolation, and six layers of metal. TowerJazz also manufactures a faster, lower noise process, named SBC18H4, with Fmax of 340 GHz.

TowerJazz will be exhibiting at IMS 2015 (booth #736) on May 19-21, and Dr. Rebeiz from UCSD will be presenting a paper on May 20, titled, “A 60 GHz 64-element Wafer-Scale Phased-Array with Full-Reticle Design” in Room 125AB from 1:50pm – 2:10pm.

Publisher: everything RF
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